Interfacing FPGAs with DDR Memory - Phil's Lab #115

How to determine FPGA pin-out of DDR interface, connect FPGA to DDR memory module, using Vivado and Memory Interface Generator (MIG) tools (Spartan-7). Including schematic and PCB design tips. PCBWay [SUPPORT] Hardware design courses: Course content: Free trial of Altium Designer: Free search engine for the best quality components from Octopart:  Learn about Altium 365, the electronics product design platform that unites PCB design, MCAD, data management, and teamwork:  Patreon: [GIT] [SOCIAL] Instagram: [LINKS] FPGA Design Tutorial: Microcontroller on FPGA: FPGA DDR PCB Tutorial: [TIMESTAMPS] 00:00 Introduction 00:44 Xerxes Rev B Hardware 02:00 Previous Videos 02:25 Altium Designer Free Trial 02:53 PCBWay 03:47 Hardware Overview 06:10 Vivado & MIG 08:06 Choosing Memory Module 10:00 DDR2 Memory Module Schematic 12:31 FPGA Banks 15:37 DDR Pin-Out 17:53 Verify Pin-Out 18:51 Additional Constraints 21:40 Termination & Pull-Down Resistors 22:52 PCB Tips 25:55 Future Video 26:16 Outro