How to make sure that interconnects designed for a previous generation of DDR will work for the next generation? Just change data rate and run simulation-based ERC analysis in Simbeor SI Compliance Analyzer as demonstrated in this short video on the Open Computing Project PCB. Simbeor found 4438 unique trace cross-sections and 455 vias and run analysis for them and found problems in about 5 min. The most likely problems here are the via localization and reference integrity violations. Vias that worked for the lower data rates may become the leaky pipes (marked with radiation signs in Simbeor) for the new data rate. Crosstalk also increases with the rise time and may also become a problem if not resolved. See more on the via localization at #simbeor #electromagnetics #signal_integrity
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