Guest
So, I managed to put together an incredibly primitive synthesizer ^^)) Now it works as a doorbell - it plays 4 notes in a cycle. The composition of the FPGA logic: 1) Generative logic-oscillator from a counter-accumulator with the output of the high-order bit as sound 2) Virtual user processor NIOS2, which feeds the required number-delta to the control input of the oscillator to create a cyclic count with the desired tone frequency, as well as changes this number to create a repeating melody 3) External SDRAM 128 Mbit for storing the control program and the processor's operation The oscillator is able to reproduce any wave from the table, but creating a table is a separate task, until it was postponed for the future, as a result, only a one-bit wave plays in the test. As a summary, I want to immediately warn those who want to repeat this - creating your own processor and independently connecting and programming SDRAM is not an easy task, just knowing the little bit and noob-coding is not enough, you ha
