Basically, the design of my DEC RL01/RL02 disk drive simulator works like a Solid-State-Drive(SSD), interfacing the DEC RL01/02-disk serial bus signals (1980) to the current FPGA technology (2012). The simulator is based on the DE1 Development and Education Board withAltera Cyclone® II EP2C20F484 FPGA. ( Next generation is based on DE0-Nano Development and Education Board Altera Cyclone® IV 4C22 FPGA ). An additional interface board is necessary to be able to connect the DEC RL01/02 disk bus to the FPGA board, because the DECRL01/02-disk bus design was based on /- 5Volt differential bus driver/receiver. One reason why I did this project: General, a Hard-Disk has a life cycle but the Software never can die. When the children of our grandchildren are grown up, they should have a memory like the software worked in the period around 1970 - 1980. Among the vintage cars it was similar. The cars were forgotten and rusted. Many cars could not be restored. The remaining cars which have been restored are now a
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