Modeling, Simulation, and Analysis of a Simple Parallel Bus System: Part 3

Topology Explorer provides two separate workflows for analyzing Parallel Bus and Serial Link interfaces. Learn more about Sigrity here: In this series of videos, we will learn how to model, simulate, and analyze a simple Parallel Bus System. In part 3, you will learn: - How to open an existing project - How to generate a W-Element Block - How to rename pins - How to adjust traces for impedance Follow along with these demo files: 00:17 Step 1: Opening a Project File 00:48 Step 2: Editing Trace Properties 01:37 Step 3: Defining Transmission Line Impedance 04:53 Step 4: Generating W-Element Model 05:09 Step 5: Renaming Pins 06:05 Step 6: Saving the Topology Do you have any questions, tips, or ideas about Parallel Bus Simulation and Analysis? Let us know in the comments section below! ________________________________________ Get the FREE Sigrity Trial -#Sigrity-Demo __________________________________________  About Us: EMA Design Automation is a leader in product development solutions ranging from electrical CAD tools, data management and PLM systems, services, training, and technical support. Learn more about EMA Design Automation at Let’s Connect! Subscribe – Website – Facebook – LinkedIn – Twitter –