FPGA & SoC Hardware Design - Xilinx Zynq - Schematic Overview - Phils Lab #50

FPGA and SoC hardware design overview and basics for a Xilinx Zynq-based System-on-Module (SoM). What circuitry is required and what to pay attention to (decoupling, configuration, voltages, sequencing, pull-ups/pull-downs, etc.) when designing more advanced hardware. Example design for Xilinx Zynq XC7Z007S System-on-Chip (SoC) in a CSG225 BGa package. Including multi-voltage buck converters, DDR termination regulators, DDR3L memory, QSPI and EMMC memory, and more! Mixed-signal hardware design course: [SUPPORT] Free trial of Altium Designer: PCBA from $0 (Free Setup, Free Stencil): Patreon: [LINKS] Avnet MiniZed: Zynq Pins: GitHub: [TIMESTAMPS] 00:00 Zynq Introduction 01:19 System-on-Module (SoM) 01:46 Datasheets, Application Notes, Manuals, ... 02:40 Altium Designer Free Trial 03:01 Schematic Overview 04:40 Power Supplies 07:50 Zynq Power, Configuration, and ADC 11:47 Zynq Programmable Logic (PL) 14:14 Zynq Processing System (PS) (Bank 500) 15:32 Pin-Out with Xilinx Vivado 17:52 QSPI and EMMC Memory, Zynq MIO Config 19:05 Zynq PS (Bank 501) 20:16 DDR3L Memory 22:55 Mezzanine (Board-to-Board) Connectors ID: QIBvbJtYjWuHiTG0uCoK