This video lecture/tutorial describes the JK Flip-Flop in detail. I begin by describing the general operation of a 7473 JK flip-flop, showing the toggle state that makes this flip-flop important for many applications. Then I show in detail how we can create a JK flip-flop using NAND gates, describing both edge-triggered and pulse-triggered configurations. I implement both types of circuit, using a pulse generator for the edge-triggered version and a master-slave JK flip-flop for the pulse-triggered implementation. Finally, I show how we can add asynchronous set and reset inputs for the master-slave configuration and implement a circuit to demonstrate that this works correctly. This video is part of a module on Digital & Analogue electronics that is taking place at Dublin City University, Ireland. ~molloyd/EE223/
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